Accelerating Next-Generation Chip Design Success

M31, the Application Specific IP platform leader, delivers a comprehensive range of high-speed interface IP designs, including USB, PCIe, MIPI, and SerDes. Their portfolio also includes foundation IP like standard cell library, memory compiler, GPIO, and OPPA library solutions, as well as analog IP such as ADC, PLL, LDO, and PVT Sensor. M31 specializes in IP integration services, such as Processor Core Hardening, enabling customers to streamline chip design integration and focus on system-level considerations. Global semiconductor leaders utilize M31’s differentiated IP to shorten their design cycles, lower their manufacturing costs, and enhance their product competitiveness.

Explore Your IP

Foundation IP

Process nodes range from 3nm to 180nm

Basic circuit design

STD-Cell Library

A variety of Standard Cell Libraries to maximize Performance, Power, and Area parameters. The company also provides specific customization for more demanding applications.

Memories

Memory compilers are designed to the highest industry standards, optimizing high density, low power, and high performance.

I/O

I/O solution consist of general-purpose I/Os and specialty I/Os (high ESD I/Os, SDIO, eMMC I/Os).

Analog IP

A portfolio of all new digital PLL IP uses core-power-only design with programmable integer mode and fractional-N mode low jitter performance phase-locked loop(PLL) for frequency synthesis.

Interface IP

Process nodes range from 2nm to 110nm

High Speed Interface Technology

USB

USB4 Gen3x2 transceiver IP provides a complete range of USB4 host and peripheral applications up to 40Gbps (20Gbps with 2-lane) with full type-C connector support.

PCIe

PCIe 5.0 PHY provides high-performance, multi-lane capability, and low-power architecture for high-bandwidth applications.

MIPI

MIPI C-PHY, D-PHY combo IP is a serial interface technology which is widely adopted in smartphones, high-end sensor, and other multimedia-enabled embedded devices.

SerDes

SerDes PHY IP provides high-performance, multi-function capability, and low-power architecture for high-bandwidth applications.

DDR

M31 LPDDR4 multi-PHY supports both LPDDR4 and LPDDR4X memory interfaces at speed up to 4267Mbps.

DisplayPort

M31 DisplayPort IP provides individual TX & RX IPs for specific applications with multi-lane capability and low-power architecture.

IP Integration Service

Process nodes range from 3nm to 110nm

IP sub-system solutions

IP Integration Service

PHY and Controller integration represents optimizes SoC data transfer capabilities, while minimizing time-to-market.